Optimization of Test Scheduling and Test Access for ITC-02 SOC Benchmark Circuits
Abstract
Problem statement: This study presented the optimized test scheduling and test access for ITC-02 SOC benchmark circuits using genetic algorithm. In the scheduling procedure of SOC, scheduling problem was formulated as a sequence of two problems and solved. Approach: Test access mechanism width was partitioned into two and three partitions and the applications of test vectors and test vector assignments for different partitions were scheduled using different operators of genetic algorithm. Results: The test application time was calculated in terms of CPU time cycles for two and three partitions of twelve ITC-02 SOC benchmark circuits and the results were compared with the integer linear programming approach. Conclusion: The results showed that the genetic algorithm based approach gives better results.
DOI: https://doi.org/10.3844/jcssp.2009.290.296
Copyright: © 2009 P. Sakthivel, R. Delhi Babu and P. Narayanasamy. This is an open access article distributed under the terms of the
Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
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Keywords
- System-on-chip
- test scheduling
- test access mechanism
- integer linear programming
- genetic algorithm
- test wrapper