TY  - JOUR
AU  - Hypolite, Bakoune Pierre 
AU  - Evariste, Wembe Tafo 
AU  - Adolphe, Moukengue Imano 
PY  - 2019
TI  - A 10GHZ Low-Offset Dynamic Comparator for High-Speed and Lower-Power ADCS
JF  - American Journal of Engineering and Applied Sciences
VL  - 12
IS  - 2
DO  - 10.3844/ajeassp.2019.156.165
UR  - https://thescipub.com/abstract/ajeassp.2019.156.165
AB  - This paper proposed a design of low-voltage Dynamic Comparator using 90 nm PTM CMOS technology for high-speed and Lower-power Analog to Digital Converter (ADC) applications. The double tail structure is employed as based for design new comparator with positive feedback due to best behavior in low-voltage that allows low delay time; decreases the offset voltage and power dissipation. Simulation results are presented with sampling frequency of 10GHZ. These results are also compared with earlier works interms of their delay time, power dissipation and offset voltage. The proposed comparator shows 5.7 mV offset which is small when compared to other dynamic comparators and preamplifier based comparators.